Schedule
Timezone: PDT
TinyML FPGA implementation for condition monitoring
Altaf KHAN, CEO
Infxl LLC
We have reduced the size of the deep neural net inference engine by minimizing the intra-network connectivity, eliminating the need for floating-point data, and replacing the multiply-accumulate operation with just accumulation. The resultant small-footprint, low-latency deep nets are suitable for embedded applications in general. They are especially suited for processing data from IoT sensors (inertial, vibration, temperature, flow, electrical, biochemical, etc.) in battery-powered endpoint applications in wearables, robots, and automotive, particularly for predictive maintenance, real-time condition monitoring, and process automation use cases. The trained deep nets are delivered in the form of compact and simple C code that is suitable for MCU, DSP, and FPGA implementations. We present FPGA size and performance results on an IoT condition monitoring use case.
Martin KELLERMANN, Marketing Manager
Microchip Technology GmbH
We have reduced the size of the deep neural net inference engine by minimizing the intra-network connectivity, eliminating the need for floating-point data, and replacing the multiply-accumulate operation with just accumulation. The resultant small-footprint, low-latency deep nets are suitable for embedded applications in general. They are especially suited for processing data from IoT sensors (inertial, vibration, temperature, flow, electrical, biochemical, etc.) in battery-powered endpoint applications in wearables, robots, and automotive, particularly for predictive maintenance, real-time condition monitoring, and process automation use cases. The trained deep nets are delivered in the form of compact and simple C code that is suitable for MCU, DSP, and FPGA implementations. We present FPGA size and performance results on an IoT condition monitoring use case.
Altaf KHAN, CEO
Infxl LLC
Altaf Khan is the CEO of Infxl LLC, Colleyville, TX. He started his career as an accelerometer system engineer in Silicon Valley, but simplifying neural nets has been his passion over the last three decades. He has developed fast deep nets for real-time applications, low-cost deep nets for battery-operated IoT endpoints, and small-footprint deep nets for FPGA. He has developed intelligent solutions for a major US airline and a well-known auto parts supplier. He has been the CTO of a brokerage company, CEO of two startups, consultant for software process improvement, and an industrial controls engineer. Altaf received his BSEE from Wilkes College, MSEE for the University of Pennsylvania, and PhD from the University of Warwick.
Martin KELLERMANN, Marketing Manager
Microchip Technology GmbH
Martin Kellermann is a Marketing Manager at Microchip Technology GmbH, Munich. Earlier he was a Staff Field Application Engineer at Xilinx. He is a seasoned FPGA and SoC professional with a track record of successful customer and project engagements in the industrial, automotive, and data-center domains. He possesses a strong background in high-speed serial data transmission, signal integrity, and hardware debugging which helped numerous customers finish their designs successfully. He has also taught courses covering industrial applications and hardware concepts. Martin is a graduate of the Landshut University of Applied Sciences.
Schedule subject to change without notice.